Mashed Articles

http://www.freepatentsonline.com/7416019.html

This patent from Johns Hopkins University teaches a high density multiwall carbon nanotube array forming a high efficiency thermal interface useful for integrated circuit cooling. Claim 1 reads:

1. A thermal interface comprising:

a first structure for making thermal contact with a second, different structure; and

a plurality of substantively aligned carbon nanotubes protruding substantively perpendicularly from a first surface of the first structure to improve thermal contact with the second structure, wherein a nanotube packing ratio is the quotient of the sum of cross section areas of carbon nanotubes in the plurality of carbon nanotubes divided by the area of the first surface of the first structure covered by the carbon nanotubes, and the nanotube packing ratio is greater than fifty percent.

http://www.freepatentsonline.com/7410597.html

CPU cooling as a growing problem as electronic circuit densities continue to increase. Often a cooling fluid is used to transport heat away from a processor and this patent from Hon Hai Precision teaches a variation of this type of cooling using a supercritical fluid incorporated with carbon nanotube to achieve a high thermal conductivity and fluidity. Claim 1 reads:

1. A thermally conductive material comprising:

a supercritical fluid configured for an evaporation-condensation cycle; and

a plurality of carbon nanotubes incorporated in the supercritical fluid, a percentage by mass of the carbon nanotubes relative to the thermally conductive material being in the range from 0.5% to 5%.

http://www.freepatentsonline.com/7411241.html

This patent from Samsung with priority going back to March 28, 2005 presents some basic claims to vertically oriented carbon nanotubes channels connected to a bit line. Claim 1 reads:

1. An integrated circuit device, comprising:

a substrate;

an electrically conductive bit line on said substrate; and

a field effect transistor having a first current carrying terminal electrically connected to said bit line, said field effect transistor comprising a nanotube channel region and a gate electrode surrounding the nanotube channel region.

However, some examples of pertinent prior art seem to have been overlooked such as US Patent 6,515,325 which teaches forming a carbon nanotube transistor with an annular gate as part of a memory cell (see column 7, lines 5-17) or US Patent 6,740,910 which teaches a vertical nanotube channel formed in a through hole of a gate structure.